Scan interrupt status and Clear register
INIT_INTERVAL_EXPIRE_INTR | If this bit is set it indicates initiator scan window has started. Write to the register with this bit set to 1, clears the interrupt source. |
INIT_CLOSE_WINDOW_INR | If this bit is set it indicates initiator scan window has finished. Write to the register with this bit set to 1, clears the interrupt source. |
INIT_TX_START_INTR | If this bit is set it indicates initiator packet (CONREQ) transmission has started. Write to the register with this bit set to 1, clears the interrupt source. |
MASTER_CONN_CREATED | If this bit is set it indicates connection is created as master. Write to the register with this bit set to 1, clears the interrupt source. |
ADV_RX_SELF_ADDR_UNMCH_INTR | If this bit is set it indicates ADV_DIRECT packet received but the self device Resolvable Private Address is not resolved yet. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv packets. |
ADV_RX_PEER_ADDR_UNMCH_INTR | If this bit is set it indicates ADV packet received but the peer device Address is not matched yet. Firmware can read the content of the packet from the INIT_SCN_ADV_RX_FIFO. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. Write to the register with this bit set to 1, clears the interrupt source. This interrupt is generated while active/passive scanning upon receiving adv packets. |
INITA_TX_ADDR_NOT_SET_INTR | If this bit is set it indicates that a valid INITA RPA to be transmitted in CONN_REQ packet in response to an ADV packet is not present in the resolving list Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. |
INI_PEER_ADDR_MATCH_PRIV_MISMATCH_INTR | If this bit is set it indicates that an Identity address is received from an initiator and matches an entry in the resolving list, but peer IRK is set and hence a corresponding RPA is expected from the initiator Write to the register with this bit set to 1, clears the interrupt source. This bit is valid only if PRIV_1_2 and PRIV_1_2_INIT are set. |
INI_SELF_ADDR_MATCH_PRIV_MISMATCH_INTR | If this bit is set it indicates that
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